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M61880FP
Laser Diode Driver/Controller
REJ03F0068-0100Z Rev.1.0 Sep.19.2003
Description
The M61880FP is a laser diode driver/controller that performs drive and laser power control of a type of semiconductor laser diode in which the semiconductor laser diode anode and monitoring photodiode cathode are connected to the stem. The M61880FP has a sink type laser drive current output pin, is capable of high-speed switching at up to 200 Mbps, and can drive a laser diode at a maximum drive current of 100 mA (drive current = switching current + bias current). A high-speed sample-and-hold circuit is incorporated, enabling a self-APC* system to be implemented without the need for laser power control from outside. * Automatic Power Control
Features
* On-chip self-APC sample-and-hold circuit High-speed sampling circuit APC 1% variance response time = 1 s (C = 0.047 F) High-impedance hold circuit (1% error or less at C = 0.047 F, t = 1 ms) * High-speed switching (200 Mbps max.) * High drive current (100 mA max.) * Bias current settable (40 mA max.) * 5 V single power supply
Application
Semiconductor laser diode application systems (LBPs, PPCs, optical communications, measuring instruments, etc.)
Pin Configuration (Top View)
Switching current setting resistance connection pin Ground 1 Bias current setting resistance connection pin Bias current setting voltage input Reference voltage output Reference voltage input Hold capacitance connection pin Sample-and-hold control input Power supply 1 RS 1 20 VCC2 19 RO Power supply 2 Laser current load output
GND1 2 RB VB Vref Vr CH S/H VCC1 3 4 5 6 7 8 9
18 NC 17 LD Laser current output Ground 2 Monitoring photodiode current input Switching data input Laser current enable input Monitoring load resistance connection pins
M61880FP
16 GND2 15 14 13 12 11 PD DATA ENB 2RM 1RM
NC 10
Package: 20P2N-A NC: Not connected
Rev.1.0, Sep.19.2003, page 1 of 20
M61880FP
Block Diagram
Monitoring photodiode current input Monitoring load resistance connection pins 1RM 11 2RM 12 IPD Reference voltage source PD 15 Laser current output LD 17 Reference voltage output Laser current load resistance Vref RO 5 19
Reference voltage input
Vr 6
Comparator
Sample-and-hold control input
S/H 8
Sample-and-hold circuit
Current switching circuit
14 DATA
Switching data input
Hold capacitance connection pin Switching current setting resistance connection pin Bias current setting voltage input Bias current setting resistance connection pin
CH RS
7 1
Switching current source (Isw) 100mA max Bias current source (IB) 40mA max
9 VCC1
Power supply 1
20 VCC2 2 GND1
Power supply 2 Ground 1
VB RB
4 3
16 GND2
Ground 2 Laser current enable control input
13 ENB ISW+IB=100mA (max) VCC1, GND1: For IC internal analog system VCC2, GND2: For IC internal digital system
Function Overview
The M61880FP is a semiconductor laser diode driver/controller that automatically performs drive and laser power control of a type of semiconductor laser diode in which the semiconductor laser diode (LD) anode and monitoring photodiode (PD) cathode are connected to the stem. Laser power control operation is performed by connecting an external capacitance to the CH pin and applying a reference voltage to the Vr pin. The PD current resulting from LD light emission flows to a resistance connected between 1RM and 2RM, and generates a voltage (VM). This VM voltage is compared with the voltage applied to the Vr pin, and if VM < Vr, the current from the CH pin is taken as a source current and an external capacitance is charged. If VM > Vr, the current from the CH pin is taken as a sink current and the external capacitance charge is discharged. This operation is performed when S/H input = "L" and DATA input = "L" (sampling). When S/H input = "H", the CH pin goes to the high-impedance state (hold) irrespective of the state of VM, Vr, and the DATA input. The LD drive current is composed of switching current ISW controlled by DATA input and LD bias current IB unrelated to the DATA input state.
Rev.1.0, Sep.19.2003, page 2 of 20
M61880FP
Pin Description
Pin No. 1 2 3 4 5 6 Symbol Rs GND1 RB VB Vref Vr Name Switching current setting resistance connection pin Ground 1 Bias current setting resistance connection pin Bias current setting voltage input Reference voltage output Reference voltage input Function Connects switching object current (ISW) setting resistance to GND. Internal analog GND Connects bias current (IB) setting resistance to GND. Leave this pin open when IB is not used. Bias current value (IB) is set by applying a voltage to this pin. Leave this pin open when IB is not used. M61880 internal reference voltage (1.5 V typ.) output pin Connected to non-reversed input pin of comparator in sample-andhold circuit. Connect this pin to Vref pin when using M61880 internal reference voltage. Connects hold capacitance to GND. This pin is connected to sample-and-hold circuit output and ISW current source input in M61880. Sampling when "H", hold when "L" Internal analog power supply. Connected to positive power supply (+5 V). Not connected to internal circuitry. Connects load resistance for converting monitor photodiode current to voltage between 1RM and 2RM. (1RM pin is connected to GND in IC.) When "H", LD drive current source circuit is turned off. Also, CH pin is forcibly fixed at "L" level. ISW+IB current flows to laser diode when "+", and IB current when "H". Connects monitor photodiode anode. Internal digital GND Connects semiconductor laser diode cathode. Not connected to internal circuitry. Connects laser current load resistance to Vcc. Internal digital power supply. Connected to positive power supply (+5 V).
7
CH
Hold capacitance connection pin Sample-and-hold control input Power supply 1 NC Monitoring load resistance connection pins Laser current enable input Switching data input Monitoring photodiode current input Ground 2 Laser current output NC Laser current load output Power supply 2
8 9 10 11, 12
S/H Vcc1 NC 1RM 2RM ENB DATA PD GND2 LD NC RO Vcc2
13 14 15 16 17 18 19 20
Operation
1. Laser drive current setting method The laser drive current consists of switching current ISW + bias current IB. (1) Switching current ISW setting method a. Decide the maximum current value ILD(MAX) to flow in the laser diode (LD). This is decided taking account of the LD type, dispersion, temperature changes, secular changes, etc. b. Find ISW (initial set value) from the following equation. ISW (initial set value) = ILD(MAX)/1.9 c. Find switching current setting resistance RS from the following equation.
RS [k] 30 x Vref (1.5V) [V] / ISW (initial set value) [mA]
In this case the LD current can be controlled in a range of 10% to 90% of ISW (initial set value).
Rev.1.0, Sep.19.2003, page 3 of 20
M61880FP (2) Bias current IB setting method Bias current IB [A] is set by deciding bias current setting resistance RB and bias current setting voltage VB.
IB [A] VB [A] / RB [] where 1.2 V VB Vcc - 2.7V, IB (max.) = 40mA
2. Switching operation When DATA = "L", the LD drive current is ISW+IB, and when DATA = "H", the LD drive current is IB. 3. ENB input In laser drive current control by DATA input, the drive current to the laser is controlled when the M61880 internal current source is on, while control by ENB turns LD drive current source operation on/off. Power is turned on when ENB = "H", and the current secure is turned off when ENB = "L". When ENB = "H", the CH pin is forcibly fixed at the "L" level, and the capacitor connected to the CH pin is forcibly discharged. When changing the ENB pin from "H" to "L", in order to prevent an abnormal current from flowing in the LD, drive the DATA pin to the "H" state, then wait 10 sec or more after the ENB pin changes from "H" to "L" before changing the DATA pin from "H" to "L". 4. Internal reset operation The M61880 incorporates a reset circuit for preventing an overcurrent in the laser when power is turned on. In the range VCC < 3.5 V (typ.), the internal current source is turned off and the CH pin is forcibly fixed at the "H" level. 5. RO pin The RO pin connects the drive current load resistance, and a currently virtually equal to ISW flows from this pin. The load resistance is connected between this pin and VCC, thereby reducing power consumption in the IC. For reasons relating to circuit operation, the voltage at this pin must be 2.5 V or higher. Therefore, if the maximum value of ISW is designated ISW(max.), maximum value RO(max.) of load resistance RO is as follows:
RS (max.) [] = Vcc (min.) [V] - 2.5 [V] ISW (max.) [A]
For example, if VCC(min.) = 4.75 V and ISW(max.) = 100 mA, RO(max.) = 22 . That is to say, when the RS value is set so that ISW is a maximum of 100 mA, RO must not exceed 22. 6. Sample-and-hold circuit (1) Overview of circuit operation The operation of the sample-and-hold circuit incorporated in the M61880 is outlined below. The PD current resulting from LD light emission flows to resistance RM connected between 1RM and 2RM, and generates a voltage (VM). This VM voltage is compared with the voltage applied to the Vr pin, and if VM < Vr, the current from the CH pin is taken as a source current and an external capacitance is charged. If VM > Vr, the current from the CH pin is taken as a sink current and the external capacitance charge is discharged. This operation is performed when S/H input = "L" and DATA input = "L" (sampling). When S/H input = "H", the CH pin goes to the high-impedance state (hold) irrespective of the state of VM, Vr, and the DATA input.
Rev.1.0, Sep.19.2003, page 4 of 20
M61880FP
Comparator Reference voltage input RM resistance generation voltage Control circuit Sample-and-hold control input S/H
Charging constantcurrent source SW1
Output (CH pin)
SW2 CH Discharging constantcurrent source External capacitance
ENB
Tr1
Conceptual Diagram of Sample-and-Hold Circuit
Operation Function Table
Input ENB H L L S/H X H L DATA X X H L X: Don't Care VM, Vr X X X VM < Vr VM > Vr Switch State SW1 OFF OFF OFF ON OFF SW2 OFF OFF OFF OFF ON Tr1 ON OFF OFF OFF OFF Output (CH Pin) Fixed at "L" High-impedance state (hold) High-impedance state (hold) Current source (sample) Current sink (sample)
(2) APC timing chart An example of a timing chart of APC operation by means of the sample-and-hold control signals is shown below. In this example, a case is shown in which the direction of the CH pin leakage current in the hold state is assumed to be the direction of flow to the M61880 (forward direction).
Power supply
ENB input
Sample
S/H input
Hold
Sample
Hold
Sample
Hold
DATA input
ILD
Laser drive current
Example of Sample-and-Hold Type APC Circuit Operation Timing Chart
Rev.1.0, Sep.19.2003, page 5 of 20
M61880FP 7. VCC and GND pins Power supply related pins are the VCC1 and VCC2 pins and the GND1 and GND2 pins. In terms of the internal circuitry , these are connected as follows. (Basically, a single power supply should be used.) VCC1, GND1: Connected to analog system. VCC2, GND2: Connected to digital system. The main points to be noted with regard to actual wiring are as follows. (1) Make the wiring as wide as possible and avoid lengthy, circuitous wiring. (2) Locate an electrolytic capacitor for voltage stabilization close to VCC1 and GND1. (3) Locate a bypass capacitor close to VCC2 and GND2.
Also ensure that M61880 power is supplied while laser diode power is being supplied. Note on Wiring of Peripheral Elements Peripheral elements necessary for M61880 operation should be located as close as possible to the M61880. Power Consumption Calculation Method M61880 power consumption P is given approximately by the following equation:
P = Icc.x.Vcc.+.I(RO) x.V(RO) +.I(LD) xV(LD)
where V(RO): RO pin voltage
V(LD): LD pin voltage
I(RO): RO pin load current I(LD): LD pin load current For example, when VCC = 5.25 V, V(RO) = V(LD) = 2.5 V, and I(RO) = I(LD) = 100 mA, the power consumption values when the laser is on and off are as follows. (1) When laser is on, (DATA = "L", ICC = 55 mA)
PON = 55.x.5.25.+.0 + 100 x.2.5 = 538.8 (mW)
(2) When laser is off, (DATA = "H", ICC = 55 mA)
PON = 55.x.5.25.+.100 x.2.5 = 538.8 (mW)
Rev.1.0, Sep.19.2003, page 6 of 20
M61880FP
Absolute Maximum Ratings
Item Power supply voltage Input voltage Output voltage Switching current Bias current Power consumption Storage temperature CH, Vr DATA, ENB, S/H RO Symbol VCC VI Vo Isw IB Pd Tstg Ratings -0.3 to +5.5 -0.3 to Vcc -0.3 to Vcc -0.3 to Vcc 120 50 980 -60 to +150 Unit V V V mA mA mW C When mounted on board. When Ta = 25C (Note) Conditions
Note: When Ta 25C, 9.8 mW/C derating should be applied.
Recommended Operating Conditions
(Unless otherwise noted, Ta = -20C to +70C)Absolute Maximum Ratings
Limits Item Power supply voltage Switching current Bias current Operating ambient temperature Note: ISW+IB 100 mA Symbol Vcc Isw IB Topr -20 Min. 4.75 Typ. 5.0 Max. 5.25 100 40 70 Unit V mA mA C
Rev.1.0, Sep.19.2003, page 7 of 20
M61880FP
Electrical Characteristics
(Unless specified otherwise noted, VCC = 5 V 5%, Ta = -20C to +70C)
Limits Item "H" input voltage "L" input voltage Reference voltage input Reference voltage output Operating voltage range Effective voltage upper limit "H" output voltage "L" output voltage Input voltage Switching current (Note) Bias current (Note) Load charge current Load discharge current Off-state output current Off output current Power supply current DATA ENB, S/H DATA ENB, S/H Vr Vref Temperature coefficient LD CH CH CH DATA, ENB LD LD CH CH CH LD VLD VI VOH VOL II -0.2 Isw IB Icg Idg Ioz LOFF Icc 43 43 -0.2 0.66 -0.5 75 20 -0.1 1.0 -0.66 2.0 0.5 50 50 63 63 2.5 2.7 Vcc-1.6 0.6 20 3.0 Symbo l VIH VIL Vr Vref 0.35 1.4 1.5 1.5 0.1 -0.1 Vcc Min. 2.0 2.0 0.8 0.8 2.0 1.6 Typ. Max. Unit V V V V V V mV/C V V V V A mA mA mA mA mA A A A mA ENB = "L", IOH = (-0.6mA) ENB = "L", IOL = (0.6mA) VI = 2.7V VI = 0.4V CH = 3.5V, Rs = 1.2k, VLD = 3V VB = 1.4V, RB = 70k, VLD = 3V ENB = "L", Vo = (0.6 to Vcc-1.6V) ENB = "L", Vo = (0.6 to Vcc-1.6V) Vo = 2.0 to 3.0V, hold state ENB = "L", DATA = "H", Isw = 50mA ENB = "H", DATA = "L", Isw = 50mA Vcc = 5.25V, ENB = DATA = 0V 0V, CH = 2.5V, DATA = 4.5V VB = 1.5V, Rs = 820, RB = 75 Ro = LD = 5.0V Io = 10A Ta = -20 to 25C Ta = 25 to 70C ILD = 75mA Test Conditions
* Reference values are values when Ta = 25C and VCC = 5 V. Note: These items indicate input voltage/output current conversion characteristics. The M61880 should be used with ISW and IB within the Specification Value range given in "Recommended Operating Conditions."
Rev.1.0, Sep.19.2003, page 8 of 20
M61880FP
Switching Characteristics
(Unless specified otherwise noted, Ta = 25C and VCC = 5 V)
Test Pins Item Operating frequency LD current rise time (*) LD current fall time (*) Symbol fop tr tf Input DATA voltage DATA voltage Output LD current LD current Limits Min. Typ. 100 1.0 1.0 Max. 2.0 2.0 Unit Mbps nsec nsec Test Conditions ILD (H) = 50mA, ILD (L) = 0mA Rs = 840, CH = 0.047F, APC adjustment; RM = adjustment (CH = 2.5V), Vr = 1.5V (Note 1) ILD (H) = 50mA, Rs = 840, CH = 0.047F, DATA = 0V APC adjustment; RM = adjustment (CH = 2.5V), Vr = 1.5V 0.5% (Note 1) ILD (H) = 50mA (Note 2) ILD (H) = 50mA (Note 2)
APC circuit response time 1
(1% variance response time)
tRP1
Vr voltage Vr voltage
LD current LD current
1
sec sec
APC circuit response time 2
(50% variance response time)
tRP2
3
Circuit on time Circuit off time
tON tOFF
ENB voltage ENB voltage
LD current LD current
350 5
sec ec
Rev.1.0, Sep.19.2003, page 9 of 20
M61880FP Note 1: Test Circuit
Oscilloscope (input) 0.047F VCC CH
20 RO
PD
LD
Oscilloscope (output)
P.G. 50 840
Vr RS
PD ILD LD Current probe Oscilloscope (input)
1RM RM 2RM Other pins open GND
DATA S/H ENB 50
P.G.
DATA voltage
90%
90% 10% tf
ILD (H)
LD voltage
10% tr
ILD (L)
1.5V Vr voltage
0%
1.5 V variance amount
TRP1 (TRP2)
TRP1 (TRP2)
ILD (H) 90% LD current 10% ILD (L)
Rev.1.0, Sep.19.2003, page 10 of 20
M61880FP Note 2: Test Circuit
20 VCC CH 0.047F 1.5V 840 RS LD Current probe 1RM RM 2RM Other pins open GND S/H DATA ENB 50 Oscilloscope (input) Vr PD ILD RO PD LD Oscilloscope (output)
P.G. tr=tf=6ns
3V EBN voltage 1.5V 1.5V 0V TON TOFF ILD (H) 90% LD current 10% ILD (L)
Rev.1.0, Sep.19.2003, page 11 of 20
M61880FP
Application Example
1. Example of sample-and-hold type self-APC circuit
Connected to prevent overshoot and undershoot when LD current rises and falls. Optimal values depend on the type of laser used and the board pattern. 100pF 36 10 Vcc2 Digital 20 RO 19 NC 18 LD 17 16 GND2 Digital PD 15 DATA 14 ENB 13 12 11 2RM 1RM 5V VCC
5V
TTL input
ISW
Charge/ discharge control circuit
COMP
IB 50k
2.5V Reference voltage 1.5V
1 RS 1.5k
2 GND1 Analog
3 RB 150
4 VB
5 Vref
6 Vr
7 CH 0.047F
8 S/H
9
10 Vcc1 NC Analog
5V
2. Example of controlling sample-and-hold circuit by means of DATA signal When the M61880 is used in optical communications, etc., (when the S/H signal cannot be supplied), the DATA signal can be used as a sample-and-hold control signal. In this case, the S/H pin should be fixed at "L". If value CH of the hold capacitor connected to the CH pin is 0.047F, switching at around 20 Mbps is possible. 3. Examples of varying LD switching drive current by means of external control (1) Varying the monitoring load resistance value (resistance connected between pins 11 and 12) The LD drive current can be varied by varying the resistance between pins 11 and 12 in the circuit in 1. above. (2) Varying the voltage applied to the Vr pin The LD drive current can be varied by applying an external voltage (within the reference voltage input range) to pin 6 in the circuit in 1. above. A maximum multiplication factor of 2/0.35 = 5.7 times can be obtained as the LD drive current ratio in this case.
Rev.1.0, Sep.19.2003, page 12 of 20
M61880FP 4. Example of sample-and-hold type self-APC circuit (Controlling two laser diodes)
100pF 36 10 RO 20 19 GND2 Digital 16
5V Vcc2 Digital
NC 18
LD 17
PD 15
DATA 14
ENB 13
2RM 12
1RM 11
M61880FP-1 TTL input COMP
Charge/ discharge control circuit
ISW
IB 5V VCC 50k
2.5V Reference voltage 1.5V
1 LD1 1.5k PD LD2 RS
2 GND1 Analog
3 RB 150
4 VB
5 Vref
6 Vr Rvr1
7
8 CH S/H 0.047F
9
10 Vcc1 NC Analog
5V
5V Vcc2 Digital 20 M61880FP-2
100pF 36 Rm 10 RO 19 NC 18 LD 17 16 GND2 Digital PD 15 DATA 14 ENB 2RM 13 12 1RM 11
TTL input COMP ISW
Charge/ discharge control circuit
IB 50k
2.5V Reference voltage 1.5V
1 RS 1.5k
2 GND1 Analog
3 RB 150
4 VB
5 Vref
6 Vr Rvr2
7
8 CH S/H 0.047F
9
10 Vcc1 NC Analog
5V
Sample-and-Hold Timing
M61880FP-1 S/H input M61880FP-2 S/H input Start of data transfer Sampling HOLD HOLD
Rev.1.0, Sep.19.2003, page 13 of 20
M61880FP
Sample-and-Hold Type APC Operation
A timing chart for a case where a sample-and-hold type APC circuit is configured using an M61880FP (Figure 1) is shown in Figure 2 on the following page. The operation of a sample-and-hold type APC circuit will be described here using the timing chart in Figure 2. It is assumed that the laser drive current is set to 50 mA (bias current = 0 mA), and the values shown in Figure 1 are used as constants required for calculation purposes.
5V VCC 100pF 36 Vcc2 Digital 20 10 RO 19 NC 18 LD 17 16
5V
IPD GND2 Digital
PD 15
DATA 14
ENB 13
2RM 12
RM
1RM 11
TTL input
ISW
Charge/ discharge control circuit
COMP
IB 50k
2.5V Reference voltage 1.5V
1 RS
2
3 GND1 RB Analog
4 VB
5 Vref
6 Vr
7 CH 0.047F
8 S/H
9
10 Vcc1 NC Analog
5V
Figure 1 Example of Sample-and-Hold Type APC Circuit Application
1. Initial sampling period (T1) When sampling starts, the CH pin voltage is 0 V, and therefore the laser diode (LD) is not emitting light. Consequently, the voltage of the COMP input pin (pin 12) is also 0 V. Next, COMP starts charging the hold capacitor connected to CH (current also starts flowing in the LD in proportion to the rise of the CH pin voltage, and the pin 12 voltage also rises), and charging is performed until the pin 12 voltage reaches comparison voltage Vr. In this case, the CH pin voltage rises from 0 V to VCH due to the M61880FP's CH pin load charge current (Icg). Time t required for this is given by the following equation.
t= CH x VCH Icg ............................ Equation (1)
In Equation (1), if CH = 0.047F, VCH = 2.5 V, and Icg = 0.66 mA (*), then t = 178s. * Minimum Icg specification value in "Electrical Characteristics" in this Specification.
Rev.1.0, Sep.19.2003, page 14 of 20
M61880FP 2. Hold periods (T2, T4) In these periods, the CH pin goes to the high-impedance state. However, the charge current does not become absolutely 0, and a slight leakage current is present. The hold capacitor is charged or discharged by the CH pin off-state leakage current (Ioz). Assuming that a leakage current (Ioz) is generated in the direction in which the hold capacitor is discharged, the change in the CH pin current (V) is given by the following equation.
V = Ioz (0.5A) x T2 (4) CH x (0.047F) ............................ Equation (2) (T2(4) is the hold time.)
When the CH pin voltage decreases by V, the laser drive current also decreases. 3. Sampling periods (T3, T5) In these periods, the LD light quantity that changed during a hold period (T2, T4) is corrected.
Taking only the influence of the CH pin leakage current into consideration (actually, LD temperature variations also have an effect), making substitutions of Ioz = 0.5A, T = 1 ms, and CH = 0.047F in Equation (2) gives a result of V = 10 mV. The time required to compensate for this V value (10 mV) is given by the following equation.
t= CH x V Icg ............................ Equation (3)
From Equation (3), t = 0.7s.
Power supply
ENB input
S/H input
Sample
Hold
Sample
Hold
Sample
Hold
DATA input
ILD
Laser drive current
T1 T2 T3 T4 T5
Figure 2 Sample-and-Hold Type APC Circuit Operation Timing Chart
Rev.1.0, Sep.19.2003, page 15 of 20
M61880FP
Description of Laser Switching Current Setting Circuit
VCC
Switching current initial setting circuit
1:1 D1 ISW1 ISW2 2XISWO I1 ISW2 Q1 Q2 V1 Vd RS ISW 2.5V 2k Id V2 I2 D2 VB
2XISWO AMP1 1.5V
VCC LD
250A Current SW 1:1
2XISWO
250A
Switching current varying circuit
Figure 1 Switching Current Setting Equivalent Circuit
1. Switching current initial setting circuit The switching current initial set value is set by switching current setting resistance Rs in a V-I conversion circuit using an op-amp.
ISWO [mA] = 30 x Vref (1.5V) [V] RS [k] ............................ (1)
2. Switching current varying circuit If the potential difference between the CH pin voltage and internal reference voltage is designated V (= VCH - 2.5 V), Id flowing in a 2 k resistance due to this V voltage is as follows.
Id = V 2k ............................ (2)
Therefore, the I1 and I2 currents are given by the following equations.
I1 = 250 A-Id I2 = 250 A-Id ............................ (3)
Next, the relationship between I1, I2, ISW1, and ISW2 due to a Gilbert circuit comprising D1, D2, Q1, and Q2, is given by the following equation.
I1 I2 = Isw1 Isw2 ............................ (4)
Also, the relationship between ISW1, ISW2, and ISW0 is given by the following equation.
Isw1 + Isw2 = 2 * Iswo ............................ (5)
Finding ISW2 from Equations (4) and (5),
ISW2 = 2 * ISWO x I1 I1 + I2 ............................ (6)
Rev.1.0, Sep.19.2003, page 16 of 20
M61880FP Meanwhile, ISW can be expressed as follows.
Isw = 2 * Iswo-Isw2 ............................ (7)
The relationship between ISW and V is found as shown below. Substituting Equation (6) in Equation (7),
ISW = 2 * ISWO ( I2 I1 + I2
) ............................ (8)
and further substituting Equation (3),
ISW = ISWO (1+ Id 250A
) ............................ (9)
Next, substituting Equation (2) gives the relationship between ISW and V as follows.
ISW = ISWO (1+ V/2k 250A
) ............................ (10)
A characteristic curve of the CH pin voltage and switching current is shown toward the end of "Electrical Characteristic Graphs" following.
Rev.1.0, Sep.19.2003, page 17 of 20
M61880FP
Electrical Characteristic Graphs
Thermal Reduction Curve Power Consumption Pd (mW) Reference Voltage - Temperature Characteristic
VCC=5V
Reference Voltage Vref (V)
1200 1000 800 600 400 200 0 -25 0 25 50 75 100 125
1.54 1.52 1.50 1.48 1.46 1.44 0 -25 0 25 50 75 100 125
Ambient Temperature Ta (C)
Ambient Temperature Ta (C)
Bias Setting Pin Input Voltage Output Characteristic
100.0
VB Pin Input Voltage - Current Voltage Characteristic
90.0 80.0 VCC=5V Ta=25C
Bias Output Current IB (mA)
VCC=5V Ta=25C RB=51
Input Current (A)
60 50 40 30 20 10 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
70.0 60.0 50.0 40.0 30.0 20.0 10.0 0 0 1.0 2.0
VB Pin Input Voltage (V)
Input Voltage (V)
Bias Current Setting Resistance Current Characteristic Bias Current Value IB (mA)
VCC=5V Ta=25C 60 50 40 30 20 10 0 0 100 200 300 400 VB=1.5V
Switching Current Setting Resistance Current Characteristic Switching Current Value ISW (mA)
VCC=5V Ta=25C 120 100 80 60 40 20 0 0 1 2 3 4 VCH=2.5V
Bias Current Setting Resistance Value RB ()
Switching Current Setting Resistance Value RS (k)
Rev.1.0, Sep.19.2003, page 18 of 20
M61880FP
CH Pin Voltage - Switching Current Characteristic
120 10.0 VCC=5V Ta=25C 9.0 8.0 7.0 VCC=5V Ta=25C
APC Comparator Input Voltage - Offset Voltage Characteristic
Switching Current ISW (mA)
100 80
Voff (mV)
RS=820 1.5 2 2.5 3 3.5
6.0 5.0 4.0 3.0 2.0 1.0 0 0 1.0 2.0
60 40 20 0 1
CH Pin Voltage Vch (V)
2RM Voltage (V)
Rev.1.0, Sep.19.2003, page 19 of 20
M61880FP
20P2N-A
JEDEC Code - e b2
11
MMP
Weight(g) 0.26 Lead Material Cu Alloy
Plastic 20pin 300mil SOP
EIAJ Package Code SOP20-P-300-1.27
Package Dimensions
20
HE
E
L1
L
Rev.1.0, Sep.19.2003, page 20 of 20
e1
Recommended Mount Pad Symbol
10
1
F A
G
D
b
A2 x
M
A1
e y
A A1 A2 b c D E e HE L L1 z Z1 x y c
z Detail G Detail F
Z1
b2 e1 I2
Dimension in Millimeters Min Nom Max 2.1 - - 0.2 0.1 0 - 1.8 - 0.5 0.4 0.35 0.25 0.2 0.18 12.7 12.6 12.5 5.4 5.3 5.2 - 1.27 - 8.1 7.8 7.5 0.8 0.6 0.4 - 1.25 - - 0.585 - - - 0.735 - - 0.25 0.1 - - 8 0 - - - 0.76 - 7.62 - - 1.27 -
I2
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